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| 1/18 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds interface ics 70bit lvds distributor BU90RT102 description lvds interface ic of rohm "serializer" "deserializer" op erates from 8mhz to 150mhz wide clock range, and number of bits range is from 35 to 70. data is transmitted seven times (7x) stream and reduce cable number by 3(1/3) or less. the rohm's lvds has low swing mode to be able to expect further low emi. driver and receiver of 4 bits operat e to 250mhz. it can be used for a variety of purposes, home appliances such as lcd-tv, business machines such as decod ers, instruments, and medical equipment. features 1) rgb10bits dual channel lvds receiver and transmitter 2) operating frequency range : 20 135mhz 3) power down mode supported. 4) support spread spectrum clock generator. 5) support reduced swing lvds for low emi. 6) package htssop-c64 applications digital tv (signal system) car navigation system copier fa equipment medical equipment vending machine, ticket vending machine no.10057eat08
technical note 2/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. absolute maximum ratings parameter symbol ratings unit supply voltage v dd -0.3 ~ 4.0 v input voltage v in -0.3 ~ v dd +0.3 v output voltage v out -0.3 ~ v dd +0.3 v storage temperature range tstg -55 ~ 125 recommended operating conditions parameter symbol ratings unit min typ max supply voltage v dd 3.0 3.3 3.6 v operating temperature range topr -20 - 85 dual-in/dual-out fin 20 - 135 mhz fout 20 - 135 mhz distribution fin 20 - 135 mhz fout 20 - 135 mhz single-in / dual-out fin 40 - 135 mhz fout 20 - 62.5 mhz dual-in / single-out fin 20 - 62.5 mhz fout 40 - 135 mhz technical note 3/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. block diagram fig.1 block diagram 2nd lin k rclk1 +/- pll inter-link multiplex & de-multiplex lvds-tx serialize lvds-tx serialize ldo regulato r ra1+/- ~ re1+/- 2nd link rclk2 +/- lvds-rx de-serialize pll pll mode[1: 0] rs xrst cap (135mhz max.) (135mhz max.) (135mhz max.) 1st link (135mhz max.) 1st link lvds-rx de-serialize ra2+/- ~ re2+/- ta1+/- ~ te1+/- ta2+/- ~ te2+/- tclk1 +/- tclk2 +/- rx rx tx tx 135 mhz 135 mhz 135 mhz 135 mhz dual in / dual out mode rx rx tx tx 135 mhz 135 mhz 135 mhz distribution mode rx rx tx tx 135 mhz 62 . 5 mhz 62 .5 mhz dual in / single out mode + rx rx tx tx 62. 5mhz 62 .5mhz 135 mhz single in / dual out mode - technical note 4/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. pin configuration fig.2 pin configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 top view rs cap gnd vdd ra1- ra1+ rb1- rb1+ rc1- rc1+ rclk1- rclk1+ rd1- rd1+ re1- re1+ ra2- ra2+ rb2- rb2+ rc2- rc2+ rclk2- rclk2+ rd2- rd2+ re2- re2+ vdd gnd reserve1 xrst td1- td1+ gnd reserve2 gnd vdd ta1- ta1+ tb1- tb1+ tc1- tc1+ tclk1- tclk1+ te1- te1+ ta2- ta2+ tb2- tb2+ tc2- tc2+ tclk2- tclk2+ td2- td2+ te2- te2+ vdd gnd mode1 mode0 technical note 5/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. pin description pin name pin no. type descriptions ra1+/- 5,6 input lvds link1 cha lvds data input rb1+/- 7,8 link1 chb lvds data input rc1+/- 9,10 link1 chc lvds data input rd1+/- 13,14 link1 chd lvds data input re1+/- 15,16 link1 che lvds data input rclk1+/- 11,12 link1 lvds clock input ra2+/- 17,18 link2 cha lvds data input rb2+/- 19,20 link2 chb lvds data input rc2+/- 21,22 link2 chc lvds data input rd2+/- 25,26 link2 chd lvds data input re2+/- 27,28 link2 che lvds data input rclk2+/- 23,24 link2 lvds clock input ta1+/- 59,60 output link1 cha lvds data output tb1+/- 57,58 link1 chb lvds data output tc1+/- 55,56 link1 chc lvds data output td1+/- 51,52 link1 chd lvds data output te1+/- 49,50 link1 che lvds data output tclk1+/- 53,54 link1 lvds clock output ta2+/- 47,48 link2 cha lvds data output tb2+/- 45,46 link2 chb lvds data output tc2+/- 43,44 link2 chc lvds data output td2+/- 39,40 link2 chd lvds data output te2+/- 37,38 link2 che lvds data output tclk2+/- 41,42 link2 lvds clock output xrst 32 input cmos power down h : normal operation l : power down (all outputs are hi-z) rs 1 input lvds swing level select h : typ=350mv l : typ=200mv mode1 mode0 33,34 input pixel data mdoe mode1 mode0 rclk2/- description l l clkin dual-in/dual-out mode l l hi-z distribution mode h l hi-z single-in/dual-out mode l h clkin dual-in/single-out mode h h - reserved vdd 4,29,36,61 - - power supply pins. gnd 3,30,35,62,64 - ground pins cap 2 - decoupling capacitor pin this pin should be connected to external decoupling capacitor. recommended capacitor is 2.2f. *1 reserve1/2 31,63 input - reserve pins must be open *1. parts list of recommended external decoupling capacitor maker parts number size [mm] capacity [ f] capacitance tolerance [%] temperature characteristics reference temperature [ ] capacitance change [%] operating temperature range [ ] voltage [v] murata grm155b30g225me15d 1.0x0.5x0.5 2.2 20 b 20 10% -25 85 4.0 murata grm155r60j225me15d 1.0x0. 5x0.5 2.2 20 x5r 25 15% -55 85 6.3 tdk c1005x7r1h222kt 1.0x0.5x 0.5 2.2 20 x7r 25 15% -55 125 5.0 kyocera cm05x5r225k04ah 1.0x0. 5x0.5 2.2 20 x5r 25 15% -55 85 4.0 kyocera cm05x5r225m04ah 1.0x0. 5x0.5 2.2 20 x5r 25 15% -55 85 4.0 technical note 6/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. dc characteristics table 1 : lvcmos dc characteristics(v dd =3.0v 3.6v, ta=-20 +85 parameter symbol limits unit conditions min typ max high level input voltage v ih v dd 0.8 - v dd v - low level input voltage v il gnd - v dd 0.2 v - input leak current i inc -10 - +10 a 0v ? ? v dd pull-down resistor p dr 20 46 100 k ? - table 2 : lvds receiver dc characteristics(v dd =3.0v 3.6v, ta=-20 +85 parameter symbol limits unit conditions min typ max lvds-rx input voltage v in_rx 0.4 - 2.1 v - lvds-rx common voltage v ic_rx 0.7 1.2 1.8 v - differential input high threshold v th_rx - - +100 mv v ic_rx =1.2v differential input low threshold v tl_rx -100 - - mv v ic_rx =1.2v lvds-rx differential voltage |v id_rx | 100 - 600 mv - lvds-rx input current v in_rx -20 - 20 a - fig.3 lvds receiver dc characteristics 0v (gnd) v th_rx v ic_rx v tl_rx v in_rx technical note 7/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. table 3 : lvds transmitter dc characteristics(v dd =3.0v 3.6v, ta=-20 +85 parameter symbol limits unit conditions min typ max differential output voltage v od 250 350 450 mv rl=100 ? normal swing rs=v dd 100 200 300 mv reduced swing rs=gnd change in v od between complementary output states v od - - 35 mv rl=100 ? common voltage v oc 1.125 1.25 1.375 v change in v oc between complementary output states v oc - - 35 mv output short circuit current i os -60 - - ma v out =0v output tri-state current i oz -10 - +10 a xrst=0v, v out =0v to v dd fig.4 lvds transmitter dc characteristics note : diff_n 0v (gnd) v od = | v (diff_p) -v (diff_n) | v oc = (v (diff_p) +v (diff_n)) / 2 diff_p=ta1+ ~ ta2+ , tclk1+ ,tclk2+ diff_n=ta1 - ~ ta2 - , tclk1 - ,tclk2 - technical note 8/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. ac characteristics table 4 : switching characteristics(vdd=3.3v, ta=25 parameter symbol limits unit min typ max skew time between rclk1 and rclk2 t ck12 -0.3 t rcp - 0.3 t rcp ns phase lock loop set time t lt - - 10 ms data latency dual-in/dual-out t rip6 - 4t rcp +5 - ns distribution - 4t rcp +5 - ns single-in/dual-out - 6t rcp +5 - ns dual-in/single-out - 2.5t rcp +5 - ns de input high time t deh 2 t rcp - - ns de input low time t del 2 t rcp - - ns de input period t del 4 t rcp must be 2nt rcp (n=integer) - ns fig.5 skew time between rclk1 and rclk2 fig.6 phase lock loop set time vdiffrc=0v vdiffrc=0v t ck12 (rclk1+)-(rclk1-) note: 1) vdiffrc = (rclk+)-(rclk-) (rclk2+)-(rclk2-) 3. 0v rclk1 +/- vdd vdd0.8 pd t lt note: 1) vdiffrc = (rclk+)-(rclk-) vdiffrc = 0v tclkx +/- x=1 , 2 technical note 9/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds receiver ac characteristics table 5 : switching characteristics(vdd=3.3v, ta=25 parameter symbol limits unit min typ max input clock period dual /dual t rcp 7.4 - 50 ns distribution 7.4 - 50 ns single/dual 7.4 - 25 ns dual/single 16 - 50 ns differential input data setup margin clkin= 75mhz t rsup 480 - - ps clkin= 112mhz 250 - - ps clkin= 135mhz 220 - - ps differential input data hold margin clkin= 75mhz t rhld 480 - - ps clkin= 112mhz 250 - - ps clkin= 135mhz 220 - - ps differential input data position 6 t rip6 2 7 t rcp -t rhld 2 7 t rcp 2 7 t rcp +t rsup ns differential input data position 5 t rip5 3 7 t rcp -t rhld 3 7 t rcp 3 7 t rcp +t rsup ns differential input data position 4 t rip4 4 7 t rcp -t rhld 4 7 t rcp 4 7 t rcp +t rsup ns differential input data position 3 t top3 5 7 t rcp -t rhld 5 7 t rcp 5 7 t rcp +t rsup ns differential input data position 2 t rip2 6 7 t rcp -t rhld 6 7 t rcp 6 7 t rcp +t rsup ns differential input data position 1 t rip1 7 7 t rcp -t rhld 7 7 t rcp 7 7 t rcp +t rsup ns differential input data position 0 t rip0 8 7 t rcp -t rhld 8 7 t rcp 8 7 t rcp +t rsup ns technical note 10/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. ac timing diagram d<6> t rip6 t rip5 t rip3 t rip2 t rip1 t rip0 t rip4 t rcp t rch t rcl ryx +/- rclkx + rclkx - x=1,2 y=a,b,c,d,e ry1 +/- skew margin is the one between rclk1 +/- and ry1 +/- ry2 +/- skew margin is the one between rclk2 +/- and ry2 +/- d<5> d<4> d<3> d<2> d<1> d<0> fig.7 ac timing diagram (1) technical note 11/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds transmitter ac characteristics table 6 : switching characteristics(vdd=3.3v, ta=25 parameter symbol limits unit min typ max output clock period dual /dual t tcp 7.4 - 50 ns distribution 7.4 - 50 ns single/dual 16 - 50 ns dual/single 7.4 - 25 ns differential output transition time t lvt - 0.6 1.5 ns differential output setup time clkout=75mhz t tsup - - 250 ps clkout=112mhz - - 200 ps clkout=135mhz - - 170 ps differential output hold time clkout=75mhz t thld - - 250 ps clkout=112mhz - - 200 ps clkout=135mhz - - 170 ps differential output position 6 t top6 2 7 t tcp - t thld 2 7 t tcp 2 7 t tcp + t tsup ns differential output position 5 t top5 3 7 t tcp - t thld 3 7 t tcp 3 7 t tcp + t tsup ns differential output position 4 t top4 4 7 t tcp - t thld 4 7 t tcp 4 7 t tcp + t tsup ns differential output position 3 t top3 5 7 t tcp - t thld 5 7 t tcp 5 7 t tcp + t tsup ns differential output position 2 t top2 6 7 t tcp - t thld 6 7 t tcp 6 7 t tcp + t tsup ns differential output position 1 t top1 7 7 t tcp - t thld 7 7 t tcp 7 7 t tcp + t tsup ns differential output position 0 t top0 8 7 t tcp - t thld 8 7 t tcp 8 7 t tcp + t tsup ns technical note 12/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. ac timing diagram d<6> t top 6 t top 5 t top 3 t top 2 t top 1 t top 0 t top 4 t tcp t tch t tcl tyx +/- tclkx + tclkx - x = 1 , 2 y = a , b , c , d , e ty1 +/- output timing is the one between tclk 1 +/- and ty1 +/- . ty2 +/- output timing is the one between tclk 2 +/- and ty2 +/- . 80 80 20 20 t lvt t lvt note 1 ) vdifft =(ty+)-(ty-) vdifft d<5> d<4> d<3> d<2> d<1> d<0> =a,b,c,clk,d,e y=1,2 fig.8 ac timing diagram (2) technical note 13/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds data mapping(1) dual-in / dual-out mode g1[ 4] r1[ 9] r1[ 8] r1[ 7] r1[ 6] r1[ 5] r1[ 4] g3[ 4] r3[ 9] r3[ 8] r3[ 7] r3[ 6] r3[ 5] r3[ 4] b1[ 5] b1[ 4] g1[ 9] g1[ 8] g1[ 7] g1[ 6] g1[ 5] b3[ 5] b3[ 4] g3[ 9] g3[ 8] g3[ 7] g3[ 6] g3[ 5] de vsync hsync b1[9] b1[8] b1[7] b1[6] de vsync hsync b3[ 9] b3[ 8] b3[ 7] b3[ 6] data11 b1[ 3] b1[ 2] g1[ 3] g1[ 2] r1[ 3] r1[ 2] data11 b3[3] b3[2] g3[3] g3[2] r3[3] r3[2] data12 b1[ 1] b1[ 0] g1[ 1] g1[ 0] r1[ 1] r1[ 0] data12 b3[1] b3[0] g3[1] g3[0] r3[1] r3[0] rclk1+/ - ra1+/ - rb1+/ - rc1+/ - rd1+/ - re1+/ - rclk2+/ - ra2+/ - rb2+/ - rc2+/ - rd2+/ - re2+/ - g2[ 4] r2[9]r2[8]r2[7]r2[6]r2[5]r2[4]g4[4]r4[9]r4[8]r4[7]r4[6]r4[5]r4[4] b2[ 5] b2[ 4] g2[ 9] g2[ 8] g2[ 7] g2[ 6] g2[ 5] b4[ 5] b4[ 4] g4[ 9] g4[ 8] g4[ 7] g4[ 6] g4[ 5] de vsync hsync b2[ 9] b2[8] b2[7] b2[6] de vsync hsync b4[ 9] b4[ 8] b4[ 7] b4[ 6] data21 b2[ 3] b2[ 2] g2[ 3] g2[ 2] r2[ 3] r2[ 2] data21 b4[ 4] b4[ 2] g4[ 3] g4[ 2] r4[ 3] r4[ 2] data22 b2[ 1] b2[ 0] g2[ 1] g2[ 0] r2[ 1] r2[ 0] data22 b4[ 1] b4[ 0] g4[ 1] g4[ 0] r4[ 1] r4[ 0] tclk2+/ - ta2+/ - tb2+/ - tc2+/ - td2+/ - te2+/ - g1[ 4] r1[ 9] r1[ 8] r1[ 7] r1[ 6] r1[ 5] r1[ 4] g3[ 4] r3[ 9] r3[ 8] r3[ 7] r3[ 6] r3[ 5] r3[ 4] b1[ 5] b1[ 4] g1[ 9] g1[ 8] g1[ 7] g1[ 6] g1[ 5] b3[ 5] b3[ 4] g3[ 9] g3[ 8] g3[ 7] g3[ 6] g3[ 5] de vsync hsync b1[9] b1[8] b1[7] b1[6] de vsync hsync b3[ 9] b3[ 8] b3[ 7] b3[ 6] data11 b1[ 3] b1[ 2] g1[ 3] g1[ 2] r1[ 3] r1[ 2] data11 b3[3] b3[2] g3[3] g3[2] r3[3] r3[2] data12 b1[ 1] b1[ 0] g1[ 1] g1[ 0] r1[ 1] r1[ 0] data12 b3[1] b3[0] g3[1] g3[0] r3[1] r3[0] tclk1+/ - ta1+/ - tb1+/ - tc1+/ - td1+/ - te1+/ - g2 [ 4] r2[9]r2[8]r2[7]r2[6]r2[5]r2[4]g4[4]r4[9]r4[8]r4[7]r4[6]r4[5]r4[4] b2[ 5] b2[ 4] g2[ 9] g2[ 8] g2[ 7] g2[ 6] g2[ 5] b4[ 5] b4[ 4] g4[ 9] g4[ 8] g4[ 7] g4[ 6] g4[ 5] de vsync hsync b2[ 9] b2[ 8] b2[ 7] b2[ 6] de vsync hsync b4[ 9] b4[ 8] b4[ 7] b4[ 6] data21 b2[ 3] b2[ 2] g2[ 3] g2[ 2] r2[ 3] r2[ 2] data21 b4[ 4] b4[ 2] g4[ 3] g4[ 2] r4[ 3] r4[ 2] data22 b2[ 1] b2[ 0] g2[ 1] g2[ 0] r2[ 1] r2[ 0] data22 b4[ 1] b4[ 0] g4[ 1] g4[ 0] r4[ 1] r4[ 0] lvds- rx input mapping lvds- tx output mapping fig.9 lvds data mapping(1) technical note 14/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds data mapping(2) distribution mode distribution mode,rclk2+/- must be high-z. no care no care no care no care no care hi- z rclk1+/ - ra 1+/ - rb 1+/ - rc 1+/ - rd 1+/ - re1+/ - rclk 2+/ - ra 2+/ - rb 2+/ - rc 2+/ - rd 2+/ - re 2+/ - tclk2+/ - ta 2+/ - tb 2+/ - tc 2+/ - td 2+/ - te 2+/ - tclk 1+/ - ta 1+/ - tb 1+/ - tc 1+/ - td 1+/ - te 1+/ - g1[ 4] r1[9]r1[8]r1[7]r1[6]r1[5]r1[4]g2[4]r2[9]r2[8]r2[7]r2[6]r2[5]r2[4] b1[5] b1[4] g1[9] g1[8] g1[7] g1[6] g1[5] b2[5] b2[4] g2[9] g2[8] g2[7] g2[6] g2[5] de vsync hsync b1[9] b1[8] b1[7] b1[6] de vsync hsync b2[9] b2[8] b2[7] b2[6] data11 b1[ 3] b1[ 2] g1[ 3] g1[ 2] r1[ 3] r1[ 2] data11 b2[3] b2[2] g2[3] g2[2] r2[3] r2[2] data12 b1[ 1] b1[ 0] g1[ 1] g1[ 0] r1[ 1] r1[ 0] data12 b2[1] b2[0] g2[1] g2[0] r2[1] r2[0] g1[ 4] r1[9] r1[8] r1[7] r1[6] r1[5] r1[4] g2[4] r2[9] r2[8] r2[7] r2[6] r2[5] r2[4] b1[5] b1[4] g1[9] g1[8] g1[7] g1[6] g1[5] b2[5] b2[4] g2[9] g2[8] g2[7] g2[6] g2[5] de vsync hsync b1[9] b1[8] b1[7] b1[6] de vsync hsync b2[9] b2[8] b2[7] b2[6] data11 b1[3] b1[2] g1[3] g1[2] r1[3] r1[2] data11 b2[3] b2[2] g2[3] g2[2] r2[3] r2[2] data12 b1[1] b1[0] g1[1] g1[0] r1[1] r1[0] data12 b2[1] b2[0] g2[1] g2[0] r2[1] r2[0] g1[ 4] r1[9] r1[8] r1[7] r1[6] r1[5] r1[4] g2[4] r2[9] r2[8] r2[7] r2[6] r2[5] r2[4] b1[5] b1[4] g1[9] g1[8] g1[7] g1[6] g1[5] b2[5] b2[4] g2[9] g2[8] g2[7] g2[6] g2[5] de vsync hsync b1[9] b1[8] b1[7] b1[6] de vsync hsync b2[9] b2[8] b2[7] b2[6] data11 b1[3] b1[2] g1[3] g1[2] r1[3] r1[2] data11 b2[3] b2[2] g2[3] g2[2] r2[3] r2[2] data12 b1[1] b1[0] g1[1] g1[0] r1[1] r1[0] data12 b2[1] b2[0] g2[1] g2[0] r2[1] r2[0] lvds-rx input mapping lvds -tx output mapping (regardless of the data latency ) fig.10 lvds data mapping(2) technical note 15/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds data mapping(3) single-in / dual-out mode single-in / dual-out mode, rclk2+/- must be high-z. no care no care no care no care no care hi- z rclk1+/ - ra1+/ - rb1+/ - rc1+/ - rd1+/ - re1+/ - rclk 2+/ - ra2+/ - rb2+/ - rc2+/ - rd2+/ - re2+/ - tclk2+/ - ta 2+/ - tb 2+/ - tc2+/ - td2+/ - te2+/ - tclk1+/ - ta 1+/ - tb 1+/ - tc 1+/ - td1+/ - te1+/ - g1[ 4] r1[9] r1[8] r1[7] r1[6] r1[5] r1[4] g2[4] r2[9] r2[8] r2[7] r2[6] r2[5] r2[4] b1[5]b1[4]g1[9]g1[8]g1[7]g1[6]g1[5]b2[5]b2[4]g2[9]g2[8]g2[7]g2[6]g2[5] de vsync hsync b1[9] b1[8] b1[7] b1[6] de vsync hsync b2[9]b2[8]b2[7]b2[6] data11 b1[3] b1[2] g1[3] g1[2] r1[3] r1[2] data11 b2[3] b2[2] g2[3] g2[2] r2[3] r2[ 2] data12 b1[1] b1[0] g1[1] g1[0] r1[1] r1[0] data12 b2[1] b2[0] g2[1] g2[0] r2[1] r2[ 0] lvds-rx input mapping lvds - tx output mapping g1[ 4] r1[ 9] r1[ 8] r1[ 7] r1[ 6] r1[ 5] r1[ 4] b1[5] b1[4] g1[ 9] g1[ 8] g1[ 7] g1[ 6] g1[ 5] data11 b1[3] b1[2] g1[ 3] g1[ 2] r1[ 3] r1[ 2] de vsync hsync b1[9] b1[8] b1[7] b1[6] b1[1] b1[0] g1[ 1] g1[ 0] r1[ 1] r1[ 0] data12 g2[ 4] r2[ 9] r2[ 8] r2[ 7] r2[ 6] r2[ 5] r2[ 4] b2[5] b2[ 4] g2[ 9] g2[ 8] g2[ 7] g2[ 6] g2[ 5] data11 b2[3] b2[2] g2[ 3] g2[ 2] r2[ 3] r2[ 2] de vsync hsync b2[9] b2[8] b2[7] b2[6] b2[1] b2[0] g2[ 1] g2[ 0] r2[ 1] r2[ 0] data12 (regardless of the data latency ) fig.11 lvds data mapping (3) technical note 16/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. lvds data mapping(4) dual-in / single-out mode ( regardless of the data latency ) no care no care no care no care no care hi- z rclk1+/ - ra1+/ - rb1+/ - rc1+/ - rd1+/ - re1+/ - rclk2+/ - ra 2+/ - rb 2+/ - rc 2+/ - rd 2+/ - re 2+/ - tclk 2+/ - ta 2+/ - tb 2+/ - tc 2+/ - td 2+/ - te 2+/ - tclk1+/ - ta1+/ - tb1+/ - tc1+/ - td1+/ - te1+/ - g1[ 4] r1[ 9] r1[ 8] r1[ 7] r1[ 6] r1[ 5] r1[ 4] g2[ 4] r2[ 9] r2[ 8] r2[ 7] r2[ 6] r2[ 5] r2[ 4] b1[ 5] b1[ 4] g1[ 9] g1[ 8] g1[ 7] g1[ 6] g1[ 5] b2[ 5] b2[ 4] g2[ 9] g2[ 8] g2[ 7] g2[ 6] g2[ 5] de vsync hsync b1[ 9] b1[ 8] b1[ 7] b1[ 6] de vsync hsync b2[9] b2[8] b2[7] b2[6] data11 b1[ 3] b1[ 2] g1[ 3] g1[ 2] r1[ 3] r1[ 2] data11 r2[3]r2[2]r2[3]r2[2]r2[3]r2[2] data12 b1[ 1] b1[ 0] g1[ 1] g1[ 0] r1[ 1] r1[ 0] data12 r2[1]r2[0]r2[1]r2[0]r2[1]r2[0] g1[ 4] r1[ 9] r1[ 8] r1[ 7] r1[ 6] r1[ 5] r1[ 4] b1[5] b1[4] g1 [ 9] g1[ 8] g1[ 7] g1[ 6] g1[ 5] data11 b1[3] b1[ 2] g1 [ 3] g1 [ 2] r1[ 3] r1[ 2] de vsync hsync b1[9] b1[8] b1[7] b1[6] b1[1] b1[ 0] g1 [ 1] g1 [ 0] r1[ 1] r1[ 0] data12 g2[ 4] r2[ 9] r2[ 8] r2[ 7] r2[ 6] r2[ 5] r2[ 4] b2[ 5] b2[ 4] g2[ 9] g2 [ 8] g2 [ 7] g2[ 6] g2[ 5] data11 b2[3] b2[2] g2[ 3] g2[ 2] r2[ 3] r2[ 2] de vsync hsync b2[ 9] b2[8] b2[ 7] b2[ 6] b2[1] b2[0] g2[ 1] g2[ 0] r2[ 1] r2[ 0] data12 lvds-rx input mapping lvds-tx output mapping fig.12 lvds data mapping(4) technical note 17/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. application circuit fig.13 application circuit example fig.14 filtering capacitor of power line lvds rx lvds rx lvds tx lvds tx lvds rx lvds rx logic lvds tx lvds tx 100 ldo cap reserve 2 reserve open 2.2f bu 90 rt 102 100 to vdd v dd 0.01[f] 0.1[f] 10[f] technical note 18/18 BU90RT102 www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. ordering part number b u 9 0 r t 1 0 2 - e 2 part no. part no. 90rt102 package htssop-c64 packaging and forming specification e2: embossed tape and reel (unit : mm) htssop-c64 13 2 33 64 - 4 +6 17.2 0.1 4 1pin mark 3.05 ref 0.5 0.85 1.1max 0.22 - 0.04 +0.05 0.145 +0.05 - 0.03 0.90.05 8.1 0.2 4.45 ref 0.450.15 0.10.05 6.1 0.1 1.00.2 (max 17.94 include burr) 0.08 m 0.08 s s ? order quantity needs to be multiple of the minimum quantity. r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. |
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